COMPANY:

Control / measuring equipment manufacturer

A female master’s student in the Department of Electrical and Electronic Engineering, University of Cambridge. The research theme is RISC-V Processor Optimization / RISC-V processor optimization. Experienced research and development in an internship.

Profile

COUNTRY / REGION
United Kingdom
SEX
Female
UNIVERSITY
University of Cambridge
SPECIALIZATION
Electrical and Electronic Engineering
ACADEMIC LEVEL
Masters

MESSAGE

I have wanted to experience working outside the UK for several years, but I always thought only somewhere in Europe, or another English-speaking country was realistic. I knew some Japanese from speaking to my mother and taking classes at university, but I didn’t think my level would be high enough to get a job. However, as an engineering student, my lecturers always taught us about Japanese technology, and after visiting a year ago, I knew I wanted to start my career in Japan. But this was easier said than done. Japanese jobs are rarely advertised to foreign graduates, so it was difficult to even find somewhere to apply to, let alone get an interview. I found FAST OFFER International Program (formerly Study Go Work JAPAN Program) through the University Anglo-Japanese Society and decided to have a go. I have felt extremely supported throughout the process. My initial meeting to discuss my application made me nervous as I hadn’t spoken one-on-one with a stranger in Japanese much before, but they gave me a lot of confidence that I had a good chance. I then completed my written essays and video application. It was actually very interesting to write about my research in Japanese, as it introduced me to a lot of vocabulary I wouldn’t learn from normal lessons. I think that even if I hadn’t received an offer, it would have been an invaluable learning experience. I was so excited to be invited to interview with a Control / measuring equipment manufacturing company. I hadn’t heard of them before, but the more I researched the company the more excited I became about the opportunity to work for them. Before my interview, I had two mentoring sessions which lasted 1.5 hours each. Again, I was nervous that they would be very intense, but my mentor was so friendly and helped me perfect my answers and presentation. I also appreciated the chance to practice my conversation skills with someone experienced in my field. I had 3 video interviews with people increasingly senior in Azbil and a test between my first and second interview. The interviews focused on my motivation for working in Japan and at Azbil, my Master’s research, and my technical skills. This included giving a presentation about some of the research I had done, which I felt much more confident in after working with my mentor. One of the best parts was that after each interview I got my results within a couple of days, so I didn’t have a long, anxious wait. I will be starting my role at this company in October 2022, and I can’t wait for this new challenge! I know it’s going to be a big change to move across the world, but I’m confident that I’ll be supported along the way and I’m incredibly grateful for this opportunity.

FINAL YEAR PROJECT

私が大学で行ったプロジェクトの中で、重要なプロジェクトが二つあります。ひとつは3年生の「RISC-V Processor Optimization/RISC-Vプロセッサー最適化」です。もうひとつは卒業論文の「Molecular Electronic Devices/分子電子デバイス」です。卒業論文の研究はまだ進行中ですから、RISC-Vプロジェクトを説明します。それから、少し卒業論文の進行状況を説明します。
RISC-Vプロジェクトの目的はプロセッサーアーキテクチャとFPGA設計について学ぶためでした。このために、チームで協力してプロセッサーのデザインを最適化するつもりでした。私の役割はリソース効率でした。使われているロジックブロックの数を最小にしたかったのです。
過程の最初はベンチマークテストのデザインでした。次に、初期設計のリソースの使用状態を分析しました。この結果、リソースを一番使っているコンポーネントはALUだと分かりました。もっと効率的にするためにDSP (デジタル信号処理)ブロックにALUを入れました。加算器もDSPブロックに入れました。それから、少しインストラクションメモリを検討しました。
最終設計ができたら、ベンチマークテストを使って初期設計と比べました。結果はよかったです。リソースの使用状態は、87%から85%になりました。これはだいたいALUと加算器からでした。DSPブロックを使ったので、プロセッサーがもっと速くなりました。最大クロックレートは4-10MHzぐらい速くなりました。
このプロジェクトから多くのことを学びました。例えば、どうやってFPGAを設計するか、プロセッサーの中に何が入っているかなどを学びました。私のプロセッサーのリソース効率は良くなりましたが、もっと時間があったら他に検討したいこともありました。最初はインストラクションメモリがまだリソースをたくさん使っていたので、この点を改善したかったです。もし同じプロジェクトをもう一度することがあったら、もっとテストの時間をとるために、時間管理を改善したいと思います。
マスターズの卒業論文は分子電子デバイスです。目的は分子電子デバイスを作って、特徴づけることです。分子デバイスが電子トンネリングを使うため、とても高速で低電力です。スーパーバイザーの研究に基づいて新しい研究をしています。
これまでに、nanogap/ナノギャップのセットをプローブステーションで作りました。ナノギャップは金のナノワイヤーの中の2nmぐらいギャップです。次の過程はナノギャップの特徴づけです。Atomic Force Microscope (AFM)/原子間力顕微鏡を使ってギャップの大きさを全て調べます。最後に分子の溶液をナノギャップに乗せてデバイスを作り、このデバイスの電気的特性を調べます。
研究を四月に終わらせて、五月にその結果を卒業論文にする予定です。

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